With the technological advances of the communication equipment and other electronic equipment, the operating speed of the semiconductor device becomes faster and faster. For increasing the mobility of electrons and holes in the semiconductor device, compound semiconductor epitaxial structures are widely used in a variety of semiconductor applications. For example, the compound semiconductor epitaxial structure may be used in the fabrication of a metal-oxide-semiconductor field-effect transistor (MOSFET).
Because the lattice constant of the silicon germanium epitaxial material is larger than that of the monocrystalline silicon substrate, a compressive stress may be applied to the channel region between the source region and the drain region in order to enhance the carrier mobility. As a consequence, the silicon germanium epitaxial material is conventionally used to form a silicon germanium epitaxial structure. The silicon germanium epitaxial structure serves as the major component of the source/drain regions of the transistor in order to enhance the device performance of the semiconductor device.
However, it is found that a germanium agglomeration phenomenon is generated during the silicide process of fabricating the silicon germanium epitaxial structure. Moreover, since the lattice constant of silicon is different from that of germanium, the interfacial lattice mismatch between the silicon germanium epitaxial structure and the silicon substrate, and between the silicon germanium epitaxial structure and other material layers formed on the silicon germanium epitaxial structure in the subsequent processes will result in a delamination problem.
Therefore, there is a need of providing an advanced method for fabricating the compound semiconductor epitaxial structure in order to eliminate the above drawbacks and increase the performance of the semiconductor device.